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Multifunction Extension IP Core for Xilinx 7 FPGAs

Multifunction IP Core

The PCI Express specification allows endpoints that incorporate more than one physical PCIe function. Such endpoints are called Multi-Function Devices. The big advantage of a Multi-Function endpoint is that separate device drivers can be associated to each physical function. This simplifies driver development and maintenance significantly by separating different peripheral functions logically into different device drivers.

For XILINX 7

Most Xilinx PCIe Hardblocks however do not support more than one physical PCIe function and do not support Multi-Function Devices natively.

Smartlogic’s new patented Multi-Function IP Core removes this restriction by extending the Xilinx PCIe hardblock with up to 6 physical PCIe functions. Compared to a PCIe Soft IP-Core solution with Multi-Function support, the Smartlogic IP-Core uses only a fraction of logic resources and will fit even in the smallest Artix FPGA devices.

More details can be found in our datasheet.

For Intel Cylone V and Arria V 

The Intel PCIe hardblocks in the Cyclone V / Arria V FPGA device families support multifunction endpoints natively but on a very low level. Smartlogic’s PCI Express multifunction IP core for Cyclone V FPGAs offers a fully productized IP core with optional DMA support. The core operates with industry standard interfaces (AXI and AXI Stream) and encapsulates the whole PCI Express protocol know-how. This frees the FPGA designer to concentrate on the project specific design tasks. 

More details can be found in our datasheet.

Download a free bitstream evaluation for several demoboards (AC701 / KC705 / Cyclone 5 GT) including user guide and detailed how-to (no registration and no NDA required): -> ZIP File

 

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